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  1. general description the 74LVC1G384 is a low-power, low-voltage, high-speed si-gate cmos device. the 74LVC1G384 provides one single pole, single throw analog switch function. it has two input/output terminals (y and z) and an active low enable input pin ( e). when pin e is high, the analog switch is turned off. schmitt trigger action at the enable input makes the circuit tolerant of slower input rise and fall times across the entire v cc range from 1.65 v to 5.5 v. 2. features n wide supply voltage range from 1.65 v to 5.5 v n very low on resistance: u 7.5 w (typical) at v cc = 2.7 v u 6.5 w (typical) at v cc = 3.3 v u 6 w (typical) at v cc =5v n switch current capability of 32 ma n high noise immunity n cmos low power consumption n ttl interface compatibility at 3.3 v n latch-up performance meets requirements of jesd 78 class i n esd protection: u hbm jesd22-a114e exceeds 2000 v u mm jesd22-a115-a exceeds 200 v n enable input accepts voltages up to 5.5 v n multiple package options n speci?ed from - 40 c to +85 c and from - 40 c to +125 c 74LVC1G384 bilateral switch rev. 02 29 august 2007 product data sheet
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 2 of 22 nxp semiconductors 74LVC1G384 bilateral switch 3. ordering information 4. marking 5. functional diagram table 1. ordering information type number package temperature range name description version 74LVC1G384gw - 40 c to +125 c tssop5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm sot353-1 74LVC1G384gv - 40 c to +125 c sc-74a plastic surface-mounted package; 5 leads sot753 74LVC1G384gm - 40 c to +125 c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1.45 0.5 mm sot886 74LVC1G384gf - 40 c to +125 c xson6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1 0.5 mm sot891 table 2. marking type number marking code 74LVC1G384gw yl 74LVC1G384gv yl 74LVC1G384gm yl 74LVC1G384gf yl fig 1. logic symbol fig 2. iec logic symbol 001aag476 e yz 001aaa373 2 4# 1 x1 1 1 fig 3. logic diagram 001aaa372 y v cc z e
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 3 of 22 nxp semiconductors 74LVC1G384 bilateral switch 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level. fig 4. pin con?guration sot353-1 and sot753 fig 5. pin con?guration sot886 fig 6. pin con?guration sot891 1 2 3 5 4 001aaa365 74LVC1G384 v cc z e gnd y 74LVC1G384 z 001aag477 y gnd n.c. v cc e transparent top view 2 3 1 5 4 6 74LVC1G384 z 001aag478 y gnd n.c. v cc e transparent top view 2 3 1 5 4 6 table 3. pin description symbol pin description sot353-1/sot753 sot886/sot891 y 1 1 independent input or output z 2 2 independent output or input gnd 3 3 ground (0 v) e 4 4 enable input (active low) n.c. - 5 not connected v cc 5 6 supply voltage table 4. function table [1] input e switch l on-state h off-state
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 4 of 22 nxp semiconductors 74LVC1G384 bilateral switch 8. limiting values [1] the minimum input voltage rating may be exceeded if the input current rating is observed. [2] the minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed. [3] for tssop5 and sc-74a packages: above 87.5 c the value of p tot derates linearly with 4.0 mw/k. for xson6 packages: above 45 c the value of p tot derates linearly with 2.4 mw/k. 9. recommended operating conditions [1] to avoid sinking gnd current from terminal z when switch current ?ows in terminal y, the voltage drop across the bidirection al switch must not exceed 0.4 v. if the switch current ?ows into terminal z, no gnd current will ?ow from terminal y. in this case, there i s no limit for the voltage drop across the switch. table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +6.5 v v i input voltage [1] - 0.5 +6.5 v i ik input clamping current v i < - 0.5 v or v i >v cc + 0.5 v - 50 - ma i sk switch clamping current v i < - 0.5 v or v i >v cc + 0.5 v - 50 ma v sw switch voltage enable and disable mode [2] - 0.5 v cc + 0.5 v i sw switch current v sw > - 0.5 v or v sw 74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 5 of 22 nxp semiconductors 74LVC1G384 bilateral switch 10. static characteristics [1] all typical values are measured at t amb =25 c. [2] these typical values are measured at v cc = 3.3 v. table 7. static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max v ih high-level input voltage v cc = 1.65 v to 1.95 v 0.65v cc - - 0.65 v cc -v v cc = 2.3 v to 2.7 v 1.7 - - 1.7 - v v cc = 2.7 v to 3.6 v 2.0 - - 2.0 - v v cc = 4.5 v to 5.5 v 0.7v cc - - 0.7v cc -v v il low-level input voltage v cc = 1.65 v to 1.95 v - - 0.35v cc - 0.35v cc v v cc = 2.3 v to 2.7 v - - 0.7 - 0.7 v v cc = 2.7 v to 3.6 v - - 0.8 - 0.8 v v cc = 4.5 v to 5.5 v - - 0.3v cc - 0.3v cc v i i input leakage current pin e; v i = 5.5 v or gnd; v cc = 0 v to 5.5 v [2] - 0.1 5 - 100 m a i s(off) off-state leakage current v i =v ih or v il ; v cc = 5.5 v; see figure 7 [2] - 0.1 5 - 200 m a i s(on) on-state leakage current v i =v ih or v il ; v cc = 5.5 v; see figure 8 [2] - 0.1 5 - 200 m a i cc supply current v i = 5.5 v or gnd; v sw = gnd or v cc ; i o =0a; v cc = 1.65 v to 5.5 v [2] - 0.1 10 - 200 m a d i cc additional supply current pin e; v i =v cc - 0.6 v; v sw = gnd or v cc ; i o =0a; v cc = 5.5 v [2] - 5 500 - 5000 m a c i input capacitance - 2.0 - - - pf c s(off) off-state capacitance - 5.0 - - - pf c s(on) on-state capacitance - 9.5 - - - pf
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 6 of 22 nxp semiconductors 74LVC1G384 bilateral switch 10.1 test circuits 10.2 on resistance v i = v cc or gnd and v o = gnd or v cc .v i = v cc or gnd and v o = open circuit. fig 7. test circuit for measuring off-state leakage current fig 8. test circuit for measuring on-state leakage current 001aag479 i s i s v i v ih v o v cc gnd z y e 001aag480 i s v i v il v o v cc gnd y z e table 8. on resistance at recommended operating conditions; voltages are referenced to gnd (ground 0 v); for graphs see figure 10 to figure 15 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max r on(peak) on resistance (peak) v i = gnd to v cc ; see figure 9 i sw = 4 ma; v cc = 1.65 v to 1.95 v - 34.0 130 - 195 w i sw = 8 ma; v cc = 2.3 v to 2.7 v - 12.0 30 - 45 w i sw = 12 ma; v cc = 2.7 v - 10.4 25 - 38 w i sw = 24 ma; v cc = 3 v to 3.6 v - 7.8 20 - 30 w i sw = 32 ma; v cc = 4.5 v to 5.5 v - 6.2 15 - 23 w r on(rail) on resistance (rail) v i = gnd; see figure 9 i sw = 4 ma; v cc = 1.65 v to 1.95 v - 8.2 18 - 27 w i sw = 8 ma; v cc = 2.3 v to 2.7 v - 7.1 16 - 24 w i sw = 12 ma; v cc = 2.7 v - 6.9 14 - 21 w i sw = 24 ma; v cc = 3 v to 3.6 v - 6.5 12 - 18 w i sw = 32 ma; v cc = 4.5 v to 5.5 v - 5.8 10 - 15 w v i =v cc ; see figure 9 - i sw = 4 ma; v cc = 1.65 v to 1.95 v - 10.4 30 - 45 w i sw = 8 ma; v cc = 2.3 v to 2.7 v - 7.6 20 - 30 w i sw = 12 ma; v cc = 2.7 v - 7.0 18 - 27 w i sw = 24 ma; v cc = 3 v to 3.6 v - 6.1 15 - 23 w i sw = 32 ma; v cc = 4.5 v to 5.5 v - 4.9 10 - 15 w
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 7 of 22 nxp semiconductors 74LVC1G384 bilateral switch [1] typical values are measured at t amb =25 c and nominal v cc . [2] flatness is de?ned as the difference between the maximum and minimum value of on resistance measured at identical v cc and temperature. 10.3 on resistance test circuit and graphs r on(?at) on resistance (?atness) v i = gnd to v cc [2] i sw = 4 ma; v cc = 1.65 v to 1.95 v - 26.0 - - - w i sw = 8 ma; v cc = 2.3 v to 2.7 v - 5.0 - - - w i sw = 12 ma; v cc = 2.7 v - 3.5 - - - w i sw = 24 ma; v cc = 3 v to 3.6 v - 2.0 - - - w i sw = 32 ma; v cc = 4.5 v to 5.5 v - 1.5 - - - w table 8. on resistance continued at recommended operating conditions; voltages are referenced to gnd (ground 0 v); for graphs see figure 10 to figure 15 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max r on =v sw / i sw . (1) v cc = 1.8 v. (2) v cc = 2.5 v. (3) v cc = 2.7 v. (4) v cc = 3.3 v. (5) v cc = 5.0 v. fig 9. test circuit for measuring on resistance fig 10. typical on resistance as a function of input voltage; t amb = 25 c 001aag481 v i v il v cc gnd z y e v sw i sw v i (v) 05 4 23 1 mna673 20 10 30 40 r on ( w ) 0 (1) (2) (3) (4) (5)
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 8 of 22 nxp semiconductors 74LVC1G384 bilateral switch (1) t amb = 125 c. (2) t amb =85 c. (3) t amb =25 c. (4) t amb = - 40 c. (1) t amb = 125 c. (2) t amb =85 c. (3) t amb =25 c. (4) t amb = - 40 c. fig 11. on resistance as a function of input voltage; v cc = 1.8 v fig 12. on resistance as a function of input voltage; v cc = 2.5 v v i (v) 0 2.0 1.6 0.8 1.2 0.4 001aaa712 25 35 15 45 55 r on ( w ) 5 (4) (3) (2) (1) v i (v) 0 2.5 2.0 1.0 1.5 0.5 001aaa708 9 11 7 13 15 r on ( w ) 5 (1) (2) (3) (4) (1) t amb = 125 c. (2) t amb =85 c. (3) t amb =25 c. (4) t amb = - 40 c. (1) t amb = 125 c. (2) t amb =85 c. (3) t amb =25 c. (4) t amb = - 40 c. fig 13. on resistance as a function of input voltage; v cc = 2.7 v fig 14. on resistance as a function of input voltage; v cc = 3.3 v 001aaa709 v i (v) 0 3.0 2.0 1.0 2.5 1.5 0.5 9 7 11 13 r on ( w ) 5 (1) (2) (3) (4) v i (v) 04 3 12 001aaa710 6 8 10 r on ( w ) 4 (1) (2) (3) (4)
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 9 of 22 nxp semiconductors 74LVC1G384 bilateral switch 11. dynamic characteristics (1) t amb = 125 c. (2) t amb =85 c. (3) t amb =25 c. (4) t amb = - 40 c. fig 15. on resistance as a function of input voltage; v cc = 5.0 v v i (v) 05 4 23 1 001aaa711 5 4 6 7 r on ( w ) 3 (2) (4) (1) (3) table 9. dynamic characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v); for load circuit see figure 18 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max t pd propagation delay y to z or z to y; see figure 16 [2] [3] v cc = 1.65 v to 1.95 v - 0.8 2.0 - 3.0 ns v cc = 2.3 v to 2.7 v - 0.4 1.2 - 2.0 ns v cc = 2.7 v - 0.4 1.0 - 1.5 ns v cc = 3.0 v to 3.6 v - 0.3 0.8 - 1.5 ns v cc = 4.5 v to 5.5 v - 0.2 0.6 - 1.0 ns t en enable time e to y or z; see figure 17 [4] v cc = 1.65 v to 1.95 v 1.0 10.0 12.0 1.0 15.5 ns v cc = 2.3 v to 2.7 v 1.0 5.7 6.5 1.0 8.5 ns v cc = 2.7 v 1.0 5.4 6.0 1.0 8.0 ns v cc = 3.0 v to 3.6 v 1.0 4.8 5.0 1.0 6.5 ns v cc = 4.5 v to 5.5 v 1.0 3.3 4.2 1.0 5.5 ns
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 10 of 22 nxp semiconductors 74LVC1G384 bilateral switch [1] typical values are measured at t amb =25 c and nominal v cc . [2] t pd is the same as t plh and t phl . [3] propagation delay is the calculated rc time constant of the typical on resistance of the switch and the speci?ed capacitance when driven by an ideal voltage source (zero output impedance). [4] t en is the same as t pzh and t pzl . [5] t dis is the same as t plz and t phz . [6] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s {(c l +c s(on) ) v cc 2 f o } where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; c s(on) = maximum on-state switch capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; s {(c l +c s(on) ) v cc 2 f o } = sum of the outputs. 11.1 waveforms and test circuit t dis disable time e to y or z; see figure 17 [5] v cc = 1.65 v to 1.95 v 1.0 7.4 10.0 1.0 13.0 ns v cc = 2.3 v to 2.7 v 1.0 4.1 6.9 1.0 9.0 ns v cc = 2.7 v 1.0 4.9 7.5 1.0 9.5 ns v cc = 3.0 v to 3.6 v 1.0 5.4 6.5 1.0 8.5 ns v cc = 4.5 v to 5.5 v 1.0 3.6 5.0 1.0 6.5 ns c pd power dissipation capacitance c l = 50 pf; f i = 10 mhz; v i = gnd to v cc [6] v cc = 2.5 v - 13.7 - - - pf v cc = 3.3 v - 15.2 - - - pf v cc = 5.0 v - 18.3 - - - pf table 9. dynamic characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v); for load circuit see figure 18 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max measurement points are given in t ab le 10 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 16. input (y or z) to output (z or y) propagation delays mna667 t plh t phl v m v m y or z input z or y output gnd v i v oh v ol
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 11 of 22 nxp semiconductors 74LVC1G384 bilateral switch measurement points are given in t ab le 10 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 17. enable and disable times 001aaa375 t plz t phz switch disabled switch enabled v y v x switch enabled output low-to-off off-to-low output high-to-off off-to-high y or z y or z e v i v ol v oh v cc v m gnd gnd t pzl t pzh v m v m table 10. measurement points supply voltage input output v cc v m v m v x v y 1.65 v to 1.95 v 0.5v cc 0.5v cc v ol + 0.15 v v oh - 0.15 v 2.3 v to 2.7 v 0.5v cc 0.5v cc v ol + 0.15 v v oh - 0.15 v 2.7 v 1.5 v 1.5 v v ol + 0.3 v v oh - 0.3 v 3.0 v to 3.6 v 1.5 v 1.5 v v ol + 0.3 v v oh - 0.3 v 4.5 v to 5.5 v 0.5v cc 0.5v cc v ol + 0.3 v v oh - 0.3 v
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 12 of 22 nxp semiconductors 74LVC1G384 bilateral switch 11.2 additional dynamic characteristics test data is given in t ab le 11 . de?nitions for test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. r l = load resistance. v ext = external voltage for measuring switching times. fig 18. load circuit for switching times v ext v cc v i v o mna616 dut c l r t r l r l g table 11. test data supply voltage input load v ext v cc v i t r , t f c l r l t plh , t phl t pzh , t phz t pzl , t plz 1.65 v to 1.95 v v cc 2.0 ns 30 pf 1 k w open gnd 2v cc 2.3 v to 2.7 v v cc 2.0 ns 30 pf 500 w open gnd 2v cc 2.7 v 2.7 v 2.5 ns 50 pf 500 w open gnd 6 v 3.0 v to 3.6 v 2.7 v 2.5 ns 50 pf 500 w open gnd 6 v 4.5 v to 5.5 v v cc 2.5 ns 50 pf 500 w open gnd 2v cc table 12. additional dynamic characteristics at recommended operating conditions; typical values measured at t amb =25 c. symbol parameter conditions min typ max unit thd total harmonic distortion r l =10k w ; c l = 50 pf; f i = 1 khz; see figure 19 v cc = 1.65 v - 0.032 - % v cc = 2.3 v - 0.008 - % v cc = 3.0 v - 0.006 - % v cc = 4.5 v - 0.001 - % r l =10k w ; c l = 50 pf; f i = 10 khz; see figure 19 v cc = 1.65 v - 0.068 - % v cc = 2.3 v - 0.009 - % v cc = 3.0 v - 0.008 - % v cc = 4.5 v - 0.006 - %
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 13 of 22 nxp semiconductors 74LVC1G384 bilateral switch f (-3db) -3 db frequency response r l = 600 w ; c l =50pf; see figure 20 v cc = 1.65 v - 135 - mhz v cc = 2.3 v - 145 - mhz v cc = 3.0 v - 150 - mhz v cc = 4.5 v - 155 - mhz r l =50 w ; c l = 5 pf; see figure 20 v cc = 1.65 v - > 500 - mhz v cc = 2.3 v - > 500 - mhz v cc = 3.0 v - > 500 - mhz v cc = 4.5 v - > 500 - mhz r l =50 w ; c l = 10 pf; see figure 20 v cc = 1.65 v - 200 - mhz v cc = 2.3 v - 350 - mhz v cc = 3.0 v - 410 - mhz v cc = 4.5 v - 440 - mhz a iso isolation (off-state) r l = 600 w ; c l = 50 pf; f i = 1 mhz; see figure 21 v cc = 1.65 v - - 46 - db v cc = 2.3 v - - 46 - db v cc = 3.0 v - - 46 - db v cc = 4.5 v - - 46 - db r l =50 w ; c l = 5 pf; f i = 1 mhz; see figure 21 v cc = 1.65 v - - 37 - db v cc = 2.3 v - - 37 - db v cc = 3.0 v - - 37 - db v cc = 4.5 v - - 37 - db v ct crosstalk voltage between digital input and switch; r l = 600 w ; c l = 50 pf; f i = 1 mhz; t r =t f = 2 ns; see figure 22 v cc = 1.65 v - 69 - mv v cc = 2.3 v - 87 - mv v cc = 3.0 v - 156 - mv v cc = 4.5 v - 302 - mv table 12. additional dynamic characteristics continued at recommended operating conditions; typical values measured at t amb =25 c. symbol parameter conditions min typ max unit
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 14 of 22 nxp semiconductors 74LVC1G384 bilateral switch 11.3 test circuits q inj charge injection c l = 0.1 nf; v gen =0v; r gen =0 w ; f i = 1 mhz; r l =1 m w ; see section 11 v cc = 1.8 v - 3.3 - pc v cc = 2.5 v - 4.1 - pc v cc = 3.3 v - 5.0 - pc v cc = 4.5 v - 6.4 - pc v cc = 5.5 v - 7.5 - pc table 12. additional dynamic characteristics continued at recommended operating conditions; typical values measured at t amb =25 c. symbol parameter conditions min typ max unit test conditions: v cc = 1.65 v: v i = 1.4 v (p-p). v cc = 2.3 v: v i = 2 v (p-p). v cc =3v: v i = 2.5 v (p-p). v cc = 4.5 v: v i = 4 v (p-p). fig 19. test circuit for measuring total harmonic distortion 001aag482 v il v o v cc 0.5v cc z/y y/z e 600 w f i r l 10 pf c l d adjust f i voltage to obtain 0 dbm level at output. increase f i frequency until db meter reads - 3db. fig 20. test circuit for measuring the frequency response when switch is in on-state 001aag483 v il v o v cc 0.5v cc z/y y/z e 50 w f i r l 0.1 pf c l db
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 15 of 22 nxp semiconductors 74LVC1G384 bilateral switch adjust f i voltage to obtain 0 dbm level at input. fig 21. test circuit for measuring isolation (off-state) 001aag484 v ih v o v cc 0.5v cc z/y y/z e 50 w f i r l 0.5v cc r l 0.1 pf c l db fig 22. test circuit for measuring crosstalk between digital inputs and switch 001aag485 v o v cc 0.5v cc z/y y/z e 50 w 600 w logic input r l 0.5v cc c l g q inj = d v o c l . d v o = output voltage variation. r gen = generator resistance. v gen = generator voltage. fig 23. test circuit for measuring charge injection 001aag486 v o v cc z/y y/z e logic input r l r gen c l v gen g 001aaa368 d v o off on off logic input v o (e)
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 16 of 22 nxp semiconductors 74LVC1G384 bilateral switch 12. package outline fig 24. package outline sot353-1 (tssop5) unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (1) z (1) q references outline version european projection issue date iec jedec jeita mm 0.1 0 1.0 0.8 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 e 1 1.3 2.25 2.0 0.60 0.15 7 0 0.1 0.1 0.3 0.425 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 0.46 0.21 sot353-1 mo-203 sc-88a 00-09-01 03-02-19 w m b p d z e e 1 0.15 13 5 4 q a a 2 a 1 l p (a 3 ) detail x l h e e c v m a x a y 1.5 3 mm 0 scale tssop5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm sot353-1 1.1
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 17 of 22 nxp semiconductors 74LVC1G384 bilateral switch fig 25. package outline sot753 (sc-74a) references outline version european projection issue date iec jedec jeita sot753 sc-74a wb m b p d e a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 4 5 plastic surface-mounted package; 5 leads sot753 unit a 1 b p cd e h e l p qy w v mm 0.100 0.013 0.40 0.25 3.1 2.7 0.26 0.10 1.7 1.3 e 0.95 3.0 2.5 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.6 0.2 0.33 0.23 a 1.1 0.9 02-04-16 06-03-16
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 18 of 22 nxp semiconductors 74LVC1G384 bilateral switch fig 26. package outline sot886 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot886 mo-252 sot886 04-07-15 04-07-22 dimensions (mm are the original dimensions) xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 1.5 1.4 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.5 0.6 a (1) max 0.5 0.04 1 6 2 5 3 4 6 (2) 4 (2) a
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 19 of 22 nxp semiconductors 74LVC1G384 bilateral switch fig 27. package outline sot891 (xson6) terminal 1 index area references outline version european projection issue date iec jedec jeita sot891 sot891 05-04-06 07-05-15 xson6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 0 1 2 mm scale dimensions (mm are the original dimensions) unit mm 0.20 0.12 1.05 0.95 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.35 0.55 a max 0.5 0.04 1 6 2 5 3 4 a 6 (1) 4 (1) note 1. can be visible in some manufacturing processes.
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 20 of 22 nxp semiconductors 74LVC1G384 bilateral switch 13. abbreviations 14. revision history table 13. abbreviations acronym description cmos complementary metal oxide semiconductor ttl transistor-transistor logic hbm human body model esd electrostatic discharge mm machine model dut device under test table 14. revision history document id release date data sheet status change notice supersedes 74LVC1G384_2 20070829 product data sheet - 74LVC1G384_1 modi?cations: ? the format of this data sheet has been redesigned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. ? added type number 74LVC1G384gm (xson6/sot886 package) ? added type number 74LVC1G384gf (xson6/sot891 package) ? section 2 f eatures : added: wide supply voltage range from 1.65 v to 5.5 v. added: switch handling capability of 32 ma. added: enable input accepts voltages up to 5 v. ? section 8 limiting v alues added: derating factors of the applicable packages. ? section 10 static char acter istics changed: maximum values of on resistance (peak) parameters and graphics. changed: conditions for input leakage and supply current. ? section 11 dynamic char acter istics : changed: typical values of the charge injection. 74LVC1G384_1 20040226 product data - -
74LVC1G384_2 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 02 29 august 2007 21 of 22 nxp semiconductors 74LVC1G384 bilateral switch 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 15.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 15.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 16. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74LVC1G384 bilateral switch ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 29 august 2007 document identifier: 74LVC1G384_2 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 recommended operating conditions. . . . . . . . 4 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 10.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.3 on resistance test circuit and graphs. . . . . . . . 7 11 dynamic characteristics . . . . . . . . . . . . . . . . . . 9 11.1 waveforms and test circuit . . . . . . . . . . . . . . . 10 11.2 additional dynamic characteristics . . . . . . . . . 12 11.3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 20 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 21 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 21 15.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 15.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 16 contact information. . . . . . . . . . . . . . . . . . . . . 21 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22


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